Prior art printed circuit boards (PCBs) are formed using conductive metal interconnects (known as “traces”) formed on a dielectric substrate. Conductive apertures are formed on the circuit board to bridge traces on opposite sides of the dielectric substrate, where the conductive apertures which have a larger diameter and may be used for mounting components are known as “through holes” and a minimal diameter conductive aperture which is used to interconnect traces on opposite sides is known as a “dot via” (prior to the formation of traces) or simply “via” (after the traces are formed). Each surface carrying trace conductors is known as a “layer”, and each dielectric substrate having traces formed on one surface or on both surfaces form a “sub”, which is a fundamental subassembly of a multi-layer board. By stacking several such subs, each sub comprising a dielectric core having traces and interconnecting vias interspersed with bare dielectric layers, and laminating them together under temperature and pressure, a multi-layer printed circuit may be formed. The dielectric substrate may comprise an epoxy resin embedded in a fiber matrix such as glass fiber woven into a cloth.
One difficulty of prior art circuit board fabrication is the formation of deep (high aspect ratio) vias and fine pitch vias. Because electroplating operations consume the metal ions in solution, it is difficult to form vias with high aspect ratios, as the more distant regions of the via from the metal ion bath have lower concentrations of metal ions for deposition than regions of the via which are near to, and replenished by, the circulating ion bath. Small diameter vias are similarly diameter-limited by the aspect ratio of the via, which is governed by the thickness of the circuit layer to be formed. Blind vias (which are open on one end only) limit the circulation of metal ions in solution at the closed end of the via.
Another difficulty of fine pitch circuit board fabrication is that dot via structures are formed in a first step, through holes are formed in a separate step, and traces are formed in a subsequent step. It is desired to form dot vias, through hole plating, and traces in a single electroplating step. It is also desired to form vias having the aspect ratio for a single layer but which are continuous through multiple layers, thereby forming stacked vias. It is also desired to provide a method which provides for reduced diameter vias and fine pitch traces for use in fabricating fine pitch PCBs.